The present invention is related to output driver circuits, and, more particularly, to a circuit and method for providing a true open drain output driver and a push/pull output driver that is easily configurable by a user command signal.
Typically, two different versions of a CMOS integrated circuit are available, one with push/pull outputs and the other with open drain outputs. Referring now to FIG. 1, a CMOS push/pull output driver 10 for an integrated circuit includes an input node 12, an output pad 14, an N-channel pull-down transistor MN1 and a P-channel pull-up transistor MP1. The current paths of transistors MN1 and MP2 are coupled together at output pad 14 and between the VDD power supply and ground. The output signal at pad 14 is inverted from the polarity of the input signal at node 12.
Referring now to FIG. 2, an NMOS open drain output driver 20 is shown having an external pull-up resistor 16 coupled to an external power supply VEXT. The NMOS open drain output driver 20 for an integrated circuit includes an input node 12, an output pad 14, and only the N-channel pull-down transistor MN1. The current paths of transistor MN1 and resistor 16 are coupled together at output pad 14 and between the VEXT power supply and ground.
The standard CMOS push/pull driver circuit 10 must have the PMOS pull-up transistor MP1 disconnected to prevent forward biasing of the P-MOS well (not shown in FIG. 1) and associated leakage current if the external pull-up voltage exceeds VDD+VBE (wherein VBE is a diode threshold voltage). A true open drain output should not be dependent on the device""s supply voltage. Therefore, integrated circuits are typically provided in either of the two driver options discussed above. These two driver options are usually based on a common circuit that is configured at the factory with either a metal mask option or a programmable fuse and does not allow the user to configure the output type.
A prior art user-configurable output circuit 30 that does provide both types of output driver is shown in FIG. 3. Output driver circuit 30 includes an input node 32 and a control signal node 34 coupled to a control logic circuit 36. In turn, the control logic circuit 36 provides logic signals to the gates of transistors MP1 and MN1. The logic conditions for driving the output is shown in table 38 in which the data output state is controlled by input node 32 (IN) and the type of output configuration desired is controlled by the control signal node 34 (PP). Note that a logic high on node 32 and a logic low on node 34 produces a xe2x80x9cHiZxe2x80x9d high impedance output since both transistors MN1 and MP1 are turned off.
The configurability provided by circuit 30 shown in FIG. 3 is volatile and has to be reconfigured by the user after powerup since the data state in the control logic circuit 36 is destroyed every time power is removed. Further, as with the standard push/pull output driver configuration described above, the N-well (not shown in FIG. 3) is forward biased once the external pull-up voltage exceeds VDD.
Therefore, in the prior art, separate devices with different mask configurations are required to completely detach the P-channel from the output driver to provide a true open drain output. Alternatively, a configurable circuit provides both types of output circuits, but the output circuit configurability is volatile and there are restrictions on the allowable external voltage coupled to the pull-up resistor.
What is desired, therefore, is a non-volatile, configurable output driver circuit that can provide both a push/pull output and a true open drain output.
According to the present invention, a FRAM configurable output driver circuit has an output stage that uses two stacked P-channel transistors in series for the pull-up device and a standard N-channel transistor pull-down device. The two stacked P-channel transistors have individual N-type wells with the source of a first P-channel transistor tied to the VDD power supply voltage and the source of a second P-channel transistor tied to the output pad. When the output drives high in push/pull mode, both P-channel output transistor are conducting and the output pad can be driven high. When the output driver drives low in either the push/pull or open drain modes, the first and second P-channel transistors are both turned off, and the output pad can be driven low. In the open drain mode, when the input is high, the output pad is tri-stated, and the output pad is pulled high by an external pull-up device. The second P-channel transistor remains off regardless of the output pad voltage. If the external pullup voltage exceeds VDD, there is no leakage current through the output pad node, because the N-well of the second P-channel transistor is connected to the pad, which is identical to the operation of a true open drain mode output driver circuit. Control signals to the output transistors are set to prevent crowbar current. Non-volatile control logic is used to set either the push/pull or open drain mode configuration.
It is an advantage of the present invention that it is user configurable as a push/pull or open drain output driver.
It is a further advantage of the output driver of the present invention that there is a significant cost, time, and flexibility advantage with this design.
It is a further advantage of the output driver of the present invention that the output driver configuration is stored in non-volatile ferroelectric random-access memory and can be changed at any time by the end user.
It is a further advantage of the output driver of the present invention that the configuration is persistently stored and the data retained even after a loss of power.
The foregoing and other objects, features and advantages of the invention will become more readily apparent from the following detailed description of a preferred embodiment of the invention, which proceeds with reference to the accompanying drawings.